Product Summary
The 87993AYILFT is a PLL clock driver, which is designed specifically for redundant clock tree designs. The 87993AYILFT receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signal frequency and phase while the other three pairs generate 2x, phase aligned clock outputs.
Parametrics
87993AYILFT absolute maximum ratings: (1)Supply Voltage, VCC: 4.6V; (2)Inputs, VI: -0.5V to VCC + 0.5 V; (3)Outputs, IO: Continuous Current: 50mA, Surge Current: 100mA; (4)Package Thermal Impedance, θJA: 47.9℃/W (0 lfpm); (5)Storage Temperature, TSTG: -65℃ to 150℃.
Features
87993AYILFT features: (1)5 differential 3.3V LVPECL outputs; (2)Selectable differential clock inputs; (3)CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL; (4)Output frequency range: 50MHz to 250MHz; (5)VCO range: 200MHz to 500MHz; (6)External feedback for "zero delay" clock regeneration with configurable frequencies; (7)Cycle-to-cycle jitter (RMS): 20ps (maximum); (8)Output skew: 70ps (maximum), within one bank; (9)3.3V supply voltage; (10)-40℃ to 85℃ ambient operating temperature; (11)Lead-Free package available.
Diagrams
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87993AYILFT |
Other |
Data Sheet |
Negotiable |
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